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Optical Technology

What is Co-Packaged Optics (CPO)? The Technology Powering AI Data Centers

CPO integrates optical transceivers directly onto switch ASICs, cutting power by 30-50% and enabling the bandwidth scaling AI clusters demand.

Updated: 2026-04-29

What Is It?

Co-Packaged Optics (CPO) is an advanced optical interconnect technology that integrates photonic transceivers directly onto the same package as a network switch ASIC or AI processor. Unlike traditional pluggable transceivers which sit in external cage modules connected via copper electrical traces, CPO moves the optics right next to the silicon die, eliminating most of the copper signal path.

The fundamental challenge driving CPO adoption is power. As data center switching speeds scale from 400G to 800G and beyond to 1.6T, the electrical signal between chip and pluggable transceiver becomes an increasingly dominant source of power loss. A pluggable transceiver at 800G consumes 15-20W per port; CPO reduces that to 8-10W, a 30-50% reduction that translates to megawatt-scale savings across a hyperscale AI cluster.

Adoption is accelerating: Arista Networks, Cisco, and Broadcom have all announced CPO-equipped switch platforms. NVIDIA is integrating optics into its NVLink interconnect fabric for multi-rack AI compute clusters. Key component suppliers with silicon photonics capabilities are positioned at the center of this transition.

The Co-Packaged Optics Alliance (CPOA), founded by Intel, Broadcom, and Coherent, is driving interoperability standards. Production qualification began in 2024 at select hyperscalers, with broad rollout expected at 800G through 2025-2027.

Why It Matters for Investors

The CPO market is projected to grow from approximately $800M in 2024 to over $4B by 2028, driven primarily by hyperscaler AI infrastructure buildout. NVIDIA's GB200 NVLink racks require massive optical interconnect bandwidth that pluggable optics cannot deliver at scale.

For investors, the key value chain positions are: silicon photonics component suppliers (direct revenue from CPO content), advanced packaging equipment (enabling CPO manufacturing), and specialty fiber infrastructure (Corning, feeding the broader density increase).

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Frequently Asked Questions

What is the difference between CPO and pluggable optics?
Pluggable optics use external transceiver modules connected to switch ASICs via copper traces. CPO integrates the optical engine directly onto the chip package, shortening the electrical path and reducing power consumption by 30-50%. The tradeoff: CPO requires new board designs and is harder to field-upgrade than swappable pluggable modules.
When will CPO reach mass market adoption in data centers?
Industry consensus targets 2025-2027 for initial hyperscaler deployments at 800G, with broad adoption accelerating as switching speeds reach 1.6T where pluggable optics face fundamental physics constraints. Leading switch vendors (Arista, Cisco) have CPO product lines in production qualification now.
Which US-listed companies have the most direct CPO exposure?
Coherent Corp (LITE) supplies silicon photonics components and is a founding CPOA member. Corning (GLW) benefits from increased optical fiber demand in AI data centers. Intel (INTC) operates a silicon photonics foundry business. NVIDIA (NVDA) is integrating CPO into future GPU interconnect fabric.
How does CPO relate to AI data center power budgets?
AI training clusters like NVIDIA DGX SuperPOD require extremely high bandwidth switching fabric consuming hundreds of kilowatts. As GPU counts scale from thousands to hundreds of thousands, switching power consumption grows proportionally. CPO's 30-50% power reduction per port becomes structurally necessary at rack-scale AI infrastructure.
Is CPO a standard or proprietary technology?
CPO is an emerging industry standard, with the Co-Packaged Optics Alliance (CPOA) driving interoperability specifications. However, individual implementations are proprietary: Intel's silicon photonics process, Broadcom's CPO switch ASIC, and Coherent's photonic engine all have unique architectures competing for socket share.